MIDDAS envisions a future where massive, diverse memories are physically integrated yet functionally store disaggregated data, enabled by holistic co-design from device to software. MIDDAS encompasses a continuous spectrum of memory characteristics. This is exemplified by BRIDGE (Blended Retention-Indexed Diverse Gain cEll), an innovative on-chip memory solution that offers high density, low energy consumption, and high speed, with tunable retention.
MIDDAS: Memory Integration and Data Dis-Aggregation (Joint with AI HW Program)
MTL Seminar Series
Shuhan Liu, Stanford
Abstract
Bio
Shuhan Liu is a PhD candidate at Stanford University, advised by H.-S. Philip Wong. She earned B.S. degree from Peking University in 2020. Her first-author work includes IEDM’23, ‘24 (2 papers), ‘25 (2 papers), and VLSI’23, ‘24, and SOSP Big Mem’25, and EDL’23, T-ED’24, ‘25. She received 2024 IEEE EDS PhD Fellowship and 2024 IEEE IEDM Best Student Paper Award.