STT-MRAM fundamentals, challenges, and applications

MTL Seminar Series

Bio: Syed M. Alam is currently the Director of Design engineering at Everspin Technologies leading the design functional areas for embedded and standalone STT-MRAM. He has worked on various aspects of design including array circuits and architecture, and new product introduction supporting test, bitcell characterization, and DDR high-speed characterization for STT-MRAM. Dr. Alam received his BS degree in Electrical Engineering from UT Austin in 1999, MS and PhD degrees in Electrical Engineering and Computer Science from MIT in 2001 and 2004, respectively. He has mentored/co-advised 5 PhD students for research on 3D integration and logic-in-memory architecture. Dr. Alam has 70 issued US patents, 15+ pending, and over 65 journal/conference publications.

Abstract: Magnetoresistive Random Access Memory (MRAM) technology was introduced into the market last decade in the form of Toggle MRAM, available in densities up to 16Mb. Spin Transfer Torque (STT) MRAM, the next generation of Magnetic Tunnel Junction (MTJ) based memory, has now become available offering higher density and bandwidth. Everspin recently commenced shipment of pre-production customer samples of 1Gb ST-DDR4 STT-MRAM memory following the successful commercialization of its 256Mb ST-DDR3 STT-MRAM. This talk will cover the device and design fundamentals, the associated challenges, and the outlook of this evolving MTJ based memory.