Abstract: For decades, the semiconductor industry was defined by the monolithic chip—large, complex dies optimized through relentless scaling. That era is giving way to a fundamentally different design paradigm. Today, we are firmly in what could be called the chiplet era. Packages containing a few chiplets heterogeneously integrated to overcome reticle limits and enhance overall system performance. But this is merely the beginning.
Emerging workloads in AI and high‑performance computing are driving us rapidly toward a future, in which packages will contain many hundreds of tightly interconnected chips. Achieving this vision requires radical advances in packaging density with ultra‑fine‑pitch interconnects approaching sub‑micrometer dimensions. We trace this technological shift, highlight the architectural implications, and discuss the increasing importance of low‑overhead interconnect fabrics as system‑on‑package becomes the new system‑on‑chip. We will link this trajectory to the work underway at Deca Technologies, whose breakthroughs in high‑density integration, ultra‑fine‑pitch wiring, and scalable architectures are shaping the new era of advanced packaging.
Bio: Georgios C. Dogiamis (Member, IEEE) received the Dipl.-Ing. degree in electrical and computer engineering from the National Technical University of Athens, Athens, Greece, in 2006, the M.Sc. degree in electrical engineering from California Institute of Technology, Pasadena, CA, USA, in 2009, and the Ph.D. degree in electrical engineering from the University of Duisburg-Essen, Duisburg, Germany, in 2014.
He was with the Informatics Department, Hellenic Army General Staff, Athens, from 2007 to 2009. Since 2009, he has been a Staff Researcher with the University of Duisburg-Essen and the Fraunhofer Institute (IMS), Duisburg. He joined the Technology Research team, Intel Corporation, Chandler, AZ, USA, in 2014, where he was a Principal Engineer and Director of the Systems & Advanced Packaging Process Engineering team. Since June 2024 he became the Sr. Director of Technology Research at Deca Technologies Inc., Tempe, AZ. His current research interests include advanced semiconductor packaging and assembly techniques for high performance computing systems, high bandwidth millimeter-wave systems, and co-packaged photonic systems.