Chin-Hang Tung

Chih Hang is Deputy Director in IIP, R&D tsmc. He joined tsmc in 2008 with the team that later established 2.5D/3D integration technology platforms, e.g. CoWoS, InFO, and SoIC. Chih Hang has been working in Taiwan and Singapore semiconductor industry for over 35 years. His research interests covered front-end gate dielectric reliability, High-K/Metal-Gate, Si-nanowire, backend Cu/low-k, and far-backend advanced 3D chip stacking and packaging. Chih Hang has authored a book (ULSI Semiconductor Technology Atlas, Wiley), co-authored book chapters, as well as over 200 journal/conf papers and more than 40 world-wide patents. He has also been invited to international conferences (IEEE VLSI, IEDM, ECTC) presenting invited papers, short courses, and tutorials. Chih Hang is a senior member of IEEE.