Silicon Compiler Technology that Enabled Cirrus Logic to Become a Fabless Semiconductor Company

Suhas Patil, Cirrus Logic

Dr. Suhas Patil, received his B. Tech (Honors) in Electronics and Electrical Communications form IIT Kharagpur in 1965 and Sc.D. in Electrical Engineering from MIT in 1970. He was an Assistant Professor within the EECS department at MIT from 1970 to 1975 and an Associate Professor of Computer Science at the University of Utah from 1975 to 1980. In 1981, he started Patil Systems where, based on his academic research on the Storage/Logic Array method of IC design, went on to develop Storage/Logic Array based Silicon Compiler systems. This company was renamed Cirrus Logic after it moved to Silicon Valley in 1984. The design automation system of Cirrus Logic enabled it to become one of the early successful fabless companies. He retired from his position as Chairman Emeritus of Cirrus Logic in 2009.

This talk presents the story of how Storage/Logic Array (SLA) invented in Computer Systems Lab (CSL) of MIT became the basis of a Silicon Complier that enabled system designers to design complex application specific Systems on a Chip (SoC) stating from early 80’s at Cirrus Logic. Ability to compile masks for multiple fabs using the same high level design allowed the company to source wafers from where ever they were available and allowed Cirrus Logic to become one of the first successful fabless semiconductor companies.

This content is restricted to our MIG members and members of the MIT community. Please login or contact us for more information about our partner programs.

Silicon Compiler Technology that Enabled Cirrus Logic to Become a Fabless Semiconductor Company

Speaker

Abstract