April 27, 2018
The Future of Nanoscale Electronics Symposium

The Future of Transistor Integration

H.-S. Philip Wong, Stanford University
  • Abstract
  • Biography

What will the semiconductor industry do after two-dimensional scaling of the silicon transistor crosses the nanometer threshold, from 14 nm, 10 nm, 7 nm, 5 nm, 3 nm, 1 nm, to sizes below a nanometer? Will these advanced technologies continue to provide the energy efficiency required of future computing systems? Will the transistor continue to play a key role in advancing electronic systems? Will new computation workloads demand new types of devices and fabrication technologies?

If history can serve as a guide, the advances in the past may help us chart a new course for the coming decades. In this talk, Prof. Wong will review some of the important advances in semiconductor devices and device fabrication that have propelled the semiconductor industry to be one of the most important foundational technologies of the last century. He will give an overview of the device technologies that are being developed today and speculate on how they will be integrated into future electronic systems.

Prof. H.-S. Philip Wong is the Willard R. and Inez Kerr Bell Professor in the School of Engineering. He joined Stanford University as Professor of Electrical Engineering in September, 2004. From 1988 to 2004, he was with the IBM T.J. Watson Research Center.

Prof. Wong’s research aims at translating discoveries in science into practical technologies. His works have contributed to advancements in nanoscale science and technology, semiconductor technology, solid-state devices, and electronic imaging. His present research covers a broad range of topics including carbon electronics, 2D layered materials, wireless implantable biosensors, directed self-assembly, device modeling, brain-inspired computing, non-volatile memory, and monolithic 3D integration.

He is a Fellow of the IEEE. He served as the Editor-in-Chief of the IEEE Transactions on Nanotechnology (2005–2006), sub-committee Chair of the ISSCC (2003–2004), General Chair of the IEDM (2007), and is currently the Chair of the IEEE Executive Committee of the Symposia of VLSI Technology and Circuits. He is the faculty director of the Stanford Non-Volatile Memory Technology Research Initiative (NMTRI), and is the founding Faculty Co-Director of the Stanford SystemX Alliance — an industrial affiliate program focused on building systems.