April 26, 2016
EECS Doctoral Dissertations

Modeling Gallium Nitride based High Electron Mobility Transistors: Linking Device Physics to High Voltage and High Frequency Circuit Design

Ujwal Radhakrishna, MIT
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Speaker PhotoUjwal Radhakrishna is a Ph.D. candidate in the department of Electrical Engineering and Computer Science at MIT and is working in the Microsystems Technology Laboratory under the supervision of Professor Dimitri Antoniadis. His graduate work at MIT involves development of compact models for GaN-based HEMT devices to enable circuit design for RF and HV operation of GaN-based electronics. The work is a candidate for industry-standardization by the compact modeling coalition (CMC). Before attending MIT, Ujwal earned B.Tech and M.Tech degrees in Electrical Engineering with specialization in Microelectronics and VLSI from the Indian Institute of Technology Madras, India in 2010-11. His research interests include solid-state physics, device modeling, device-circuit characterization, and energy harvesting. Ujwal has industrial experience at Fairchild Semiconductor, Analog Devices and Texas instruments.

Gallium-Nitride-based high electron mobility transistor (HEMTs) technology is increasingly finding space in high voltage (HV) and high frequency (HF) circuit application domains. The superior breakdown electric field, high electron mobility, and high temperature performance of GaN HEMTs are the key factors for its use as HV switches in converters and active components of RF-power amplifiers. Designing circuits in both application regimes requires accurate compact device models that are grounded in physics and can describe the non-linear terminal characteristics. Currently available compact models for HEMTs are empirical and hence are lacking in physical description of the device, which becomes a handicap in understanding key device-circuit interactions and in accurate estimation of device behavior in circuits. This thesis seeks to develop a physics-based compact model for GaN HEMTs from first principles which can be used as a design tool for technology optimization to identify device-performance bottlenecks on one hand and as a tool for circuit design to investigate the impact of behavioral nuances of the device on circuit performance, on the other. Part of this thesis consists of demonstrations of the capabilities of the model to accurately predict device characteristics such as terminal DC- and pulsed-currents, charges, small-signal S-parameters, large-signal switching characteristics, load-pull, source-pull and power-sweep, inter-modulation-distortion and noise-figure of both HV- and RF-devices.

The thesis also aims to tie device-physics concepts of carrier transport and charge distribution in GaN HEMTs to circuit-design through circuit-level evaluation. In the HV-application regime, benchmarking is conducted against switching characteristics of a GaN DC-DC converter to understand the impact of device capacitances, field plates, temperature and charge-trapping on switching slew rates. In the RF-application regime, validation is done against the large-signal characteristics of GaN-power amplifiers to study the output-power, efficiency and compression characteristics as function of class of operation. Noise-figure of low-noise amplifiers is tested to estimate the contributions of device-level noise sources, and validation against switching frequency and phase-noise characteristics of voltage-controlled oscillators is done to evaluate the noise performance of GaN HEMT technology. Evaluation of model-accuracy in determining the conversion-efficiency of RF-converters and linearity metrics of saturated non-linear amplifiers is carried out. The key contribution of this work is to provide a tool in the form of a physics-based compact model to device-technology engineers and circuit-designers, who can use it to evaluate the potential strengths and weaknesses of the emerging GaN technology.

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